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| COM3005 | Computer Architecture | 3+0+0 | ECTS:6 | | Year / Semester | Fall Semester | | Level of Course | First Cycle | | Status | Compulsory | | Department | DEPARTMENT of COMPUTER ENGINEERING | | Prerequisites and co-requisites | None | | Mode of Delivery | Face to face | | Contact Hours | 14 weeks - 3 hours of lectures per week | | Lecturer | Dr. Öğr. Üyesi Selçuk CEVHER | | Co-Lecturer | None | | Language of instruction | | | Professional practise ( internship ) | None | | | | The aim of the course: | | Computer architecture is about the structure and operation of digital computers. Its purpose is to present the nature and characteristics of modern-day computer systems. |
| Learning Outcomes | CTPO | TOA | | Upon successful completion of the course, the students will be able to : | | | | LO - 1 : | understand the serial and parallel data input/output methods | 2,3,12 | 1, 3 | | LO - 2 : | have knowledge on PC bus structures. | 2,3,12 | 1, 3 | | LO - 3 : | have knowledge on the cache memory structure and its operation | 2,3,12 | 1, 3 | | LO - 4 : | gain knowlede and experience on the operation of the optical and magnetic storage devices. | 2,3,12 | 1, 3 | | LO - 5 : | interpret the multi-processor systems | 2,3,12 | 1, 3 | | LO - 6 : | develop system software for PC. | 2,3,12 | 1, 3 | | CTPO : Contribution to programme outcomes, TOA :Type of assessment (1: written exam, 2: Oral exam, 3: Homework assignment, 4: Laboratory exercise/exam, 5: Seminar / presentation, 6: Term paper), LO : Learning Outcome | | |
| The Central Processing Unit, DRAM Organization, Cache Memory, Magnetic Disk, RAID, Optical Memory, Parallel I/O (interrupted I/O and Direct Memory Access, Serial I/O, System Buses, Memory Management, Super scalar Processors, RISCs, Parallel Processing. Programming PC computers to solve industrial problems. Assembly language for Intel-based computers. Software development. |
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| Course Syllabus | | Week | Subject | Related Notes / Files | | Week 1 | Computer systems: Advances in microprocessor and computer architecture. Cache memory.Cache memory organizations. | | | Week 2 | Memory management. Virtual memory system. Segmentation | | | Week 3 | Serial data Input/Output method | | | Week 4 | Parallel data I/O: Interrup and direct memory access controllers | | | Week 5 | Magnetic storage systems | | | Week 6 | Magnetic storing techniques | | | Week 7 | Optic storage | | | Week 8 | Mid-term exam | | | Week 9 | CRT and LCD displays and controllers | | | Week 10 | CRT and LCD controllers. Text and graphic memories | | | Week 11 | Pipeline processor design | | | Week 12 | Multiprocessor systems with shared memory | | | Week 13 | Programming multiprocessor systems | | | Week 14 | Error detection and correction | | | Week 15 | Troubleshooting | | | Week 16 | End-of-term exam | | | |
| 1 | Stalling, W., 1996, Computer Organization and Architecture, Designing for Performance, Prentice-Hall, 682 p. | | | |
| 1 | Englander, I., 2000, The Architecture of Computer Hardware and System Software, John Wiley, 764 p. | | | 2 | Wilkinson, B., 1996, Computer Architecture, Design and Performance, Prentice Hall, 463 p. | | | |
| Method of Assessment | | Type of assessment | Week No | Date | Duration (hours) | Weight (%) | | Mid-term exam | 8 | 08/11/2012 | 2 | 50 | | End-of-term exam | 16 | 05/01/2013 | 2 | 50 | | |
| Student Work Load and its Distribution | | Type of work | Duration (hours pw) | No of weeks / Number of activity | Hours in total per term | | Yüz yüze eğitim | 3 | 14 | 42 | | Sınıf dışı çalışma | 3 | 14 | 42 | | Arasınav için hazırlık | 15 | 1 | 15 | | Arasınav | 2 | 1 | 2 | | Dönem sonu sınavı için hazırlık | 15 | 1 | 15 | | Dönem sonu sınavı | 2 | 1 | 2 | | Total work load | | | 118 |
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